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apc voltage in its output circuit. The two
at the junction of resistors R8 and R9. The
input signals are the fss if. signal from the
larger portion of the discriminator voltage
is developed across resistor R8, and is ap-
fss if. amplifier module A18 (para 27) and
a dc voltage from phase comparator mod-
plied in series with the comparator output
ule A17 (para 28). The apc voltage is ap-
to the antihunt network (d below) through
coupling capacitor C9 as the ac portion of
plied to the capacitance diode circuit of the
the apc voltage. The remainder of the dis -
vfo. If aphase-locked condition exists (that
is, if the vfo is on frequency), the apc volt-
criminator voltage is developed across re-
sistor R9; its polarity is opposite to that
age will assume the reference level to
developed across resistor R8. This volt-
maintain the vfo output on frequency. If the
age, plus the phase comparator output dc
vfo output frequency changes, the fss dis -
voltage, is applied to the antihunt network
criminator will develop ac and dc hunting
(d below) through discriminator load re-
voltages. These error signals change the
sistor R10 as the dc portion of the apc
apc voltage applied to the frequency con-
voltage. Resistor R7, together with capac-
trol circuit of the vfo, which shifts the vfo
itors C7 and C8, determine the reaction
output frequent y to within the pull-in and
time of the discriminator driver.
hold-in range of the phase comparator.
d. Resistors R11 and R12 together with
a. A signal from the fss if. module A18
capacitor C10 form the antihunt network
is applied to the base of discriminator
for the fss loop. Both the ac and the dc
driver Q1 through coupling capacitor C1.
portions of the apc voltage are applied
The signal is amplified by Q1 and applied
through this network to the vfo. However,
to the discriminator (b below). Base bias-
the main effect will occur on the ac portion
ing voltage for Q1 is provided by voltage-
(developed by the fss discriminator) since
divider resistors R1 and R2. Resistor R3
the higher the frequency of the error volt-
is the emitter swamping resistor for Q1.
age, the higher the attenuation (by virtue of
Resistors R4 and R13 provide series and
the ac shunting through capacitor C10). To
shunt loading, respectively, for the collec-
prevent regeneration, this antihunt net-
tor tuned circuit. Capacitor C2 is an rf
work damps the fss loop gain and stops the
bypass capacitor for the Q1 emitter.
hunting action of the vfo when the phase
b. The discriminator is a Travis-type.
comparator acquires control of the vfo.
The tuned circuit, consisting of the trans-
e. Choke L1 and capacitor C11 form a
former T1 secondary and capacitor C3, is
decoupling network to prevent rf from
tuned to 5.95 mc. The tuned circuit, con-
being coupled into the  power supply.
sisting of transformer T2 secondary and
capacitor C4, is tuned to 5.25 mc. At the
center frequency of 5.6 mc, both tank cir-
30. Voltage Regulator Module A16
cuits have equal currents induced in them.
The voltage rectified by diode CR1 and
developed across resistor R5, is equal to
The voltage regulator circuit supplies
the voltage rectified by diode CR2 and de-
the entire fss system, including the vfo,
veloped across resistor R6. Since these
with a regulated+ 10 volts dc. The regulator
voltages are equal but of opposite polarity,
uses a high power germanium transistor
there is no output. At frequencies above
(Q1) as a series regulator in conjunction
or below the signal center frequency, the
with a medium-power silicon transistor
voltages developed across resistors R5
(Q2). Transistor Q2 operates as a dc am-
and R6 are unequal and a resultant output
plifier. The combination of resistor R5 and
voltage is developed. Capacitors C5 and
diode CR2 forma voltage-divider network,
C6 rf filter capacitors across load resis-
with diode CR2 maintaining the base of the
tors R5 and R6, respectively. The discrim-
dc amplifier at a constant reference volt-
inator output can be measured at test jack
age. The combination of diode CR1 and
J2 .
emitter resistor R4 forms a voltage di-
vider. Any variation in output voltage
c. The discriminator output is pivoted
about the control voltage input from A17
appears across resistor R4, since CR1

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