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Page Title: Frequency Synthesizer System If. Amplifier Module A18
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Figure 20. 53-Mc filter module A 13, sthematic diagram
the filter properly and minimize varia-
center-tapped secondary winding
of transformer T1 neutralizes Q2
tions due to the varying impedances of
(b below).
transistors. The rf output of module A12
can be measured at test jack J2.
(2) Resistors R1 and R2 form a volt-
age-divider network to develop the
fixed-bias portion of the emitter-
27. Frequency Synthesizer System If.
to-base bias of of Q1. Resistor R3
Amplifier Module A18
stabilizes the emitter current. Ca-
pacitor C2 is an rf bypass capacitor
for the Q1 emitter.
The fss if. amplifier module (A18) am-
plifies the 5.6-mc signal input from fss
b. Second If. Amplifier Q2.
(1) The amplified 5.6-mc signal from
second mixer module A12 (para 26) and
transistor Q1 is applied from the
applies it to fss discriminator driver
module All (para 29) and phase compar-
secondary  of  transformer  T1
through coupling capacitor C6 to
ator module (para 28) A17. The fss if.
the base of Q2. The signal output is
amplifier circuit consists of two cascaded,
developed across the tuned collec-
double-tuned, transformer-coupled am-
tor circuit consisting of variable
plifier stages. The signal amplitude ap-
conductor L2 and capacitor C8. The
plied to the fss if. amplifier is sufficient
signal developed across this tuned
to cause limiting.
circuit is then coupled through ca-
a. First If. Amplifier Q1.
pacitor C9 to the second tuned cir-
(1) The 5.6-mc if. signal from module
cuit, consisting of capacitor C10
A12 is coupled through capacitor
and the primary of transformer T2.
C1 to the base of Q1. The signal
(2) Resistors R6 and R7 form a volt-
output is developed across the
age-divider network which devel-
tuned collector circuit, consisting
ops the fixed-bias portion of the
of variable inductor L1 and capac-
emitter-to-base bias of Q2. Resis-
itor C3. Resistor R4 broadens the
tor R5 stabilizes the emitter cur-
frequency response of the tuned
rent. Capacitor C7 is a bypass
circuit.  The  signa1  developed
capacitor for the top of trans-
across this tuned circuit is coupled
former T1. Resistor R8 is a load
through capacitor C4 to a second
for the tuned circuit. Resistor R10,
tuned circuit consisting of capac-
across the secondary of trans-
itor C5 and the primary of tuned
former T2, provides the proper
c o u p l i n g transformer T1. The

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