TRANSMIT LOGIC

TM 11-5820-918-13

4-26. TRANSMIT LOGIC. The transmit logic forms the digital control function for the

transmitter and is composed of three principal circuits: a programmer for controlling

the automatic sweep start function initiated by the front panel programmer switches,

a frequency counter for driving the frequency readout display, and a frequency

blanker for control and storage of transmitter blanking frequencies.

4-27. Programmer (figure FO-14) (S/N 400101 and on). This circuit (1A2A1) has

a 60-minute clock and a five-minute interval decoder to perform the auto program start

function. U 1 and U 3 form the control logic for the synthesizer commands: start,

stop, reset, and end sweep blanking. The START and RESET switches are connected

at U7-3 and U7-5. When the mode switch is in the SET position, these inputs exercise

the clock run/reset latch (U25). The clock's time base is the 5 MHz signal from the

frequency standard. U5 and U6 divide the 5 MHz by 50, to 100 kHz. U10, Ull, U12,

U18, and U17 divide the 100 kHz down to 1 Hz. U 30 is the programmer clock "seconds"

counter. Its carry output advances U24 which divides by six and is the 10's of

seconds counter. U22 and U28 operate similarly for the minutes and tens of minutes.

Counter dividers U18, U17, U30 and U24 are all reset and held at zero when the clock

run/reset latch (U25) is in the reset state. Resetting the clock latch also triggers

one-shot U31-10 providing a momentary reset pulse to counter dividers U28 and U22.

The clock is manually advanced in integer minutes by the addition of advance timer

pulses from U31-7 into U23-12. The clock circuit is powered from the +5VB supply

which is supplied from the switching regulator (1A3A3) and battery backup when

primary power is off. The five-minute interval decoding is done by U33 and U21

with 12 output lines that go to the subpanel program switches. One line out of the

12 goes low for approximately 500 microseconds at the beginning of its respective five-

minute interval. If that particular interval switch is selected, an auto start pulse is

generated.

4-28. The TEST switch activates the battery and circuit status lights by supplying

+5VB to U26-14 and enables U20-4 and U20-10. It also supplies current to the base

of Q3 which in turn saturates Q2. Q2 then supplies the battery voltage to the voltage

divider network of R21, R23, and R22. This network, in conjunction with U26, yields

the following battery condition light indications:

greater than 23 volts = green light

between 18 to 23 volts = red and green lights

less than 18 volts - red light

Circuit status is determined by U8 which measures the power supply voltages and

the out-of-lock (OOL) flag from the synthesizer. The start, stop, and reset push-

button lamps are driven by Q1 when they are active.

4-29. Frequency Counter (figure FO-15) ( S/N 400101 and on). The frequency counter

receives a "count" signal from the synthesizer which is related to the output frequency

as follows:

where fo is the output frequency in MHz. This signal is buffered by U28-1 and pre-

sented to divider U9-13 which performs two functions. First, it acts as the gate for

the counter; that is, this gate is enabled by U9-6 for 4 ms during each count cycle.

When U9 is enabled (U9-11 and 12 high), the signal at U9-13 is divided by two at U9-

9, and further divided by U23, U31, U39, and U47. Each counter divides by ten.

At the conclusion of each 4 ms gate period, the count on these counters is strobed