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| TM 11-5820-695-35
frequency divider 1A14A4. The amplified 14.1875 MHz
by meter detector diode CR3 to produce a dc current
if output signal is also applied to bias diode CR6 on
proportional to the rf signal level. The meter current
board A1 which rectifies the signal to provide a turn-off
(detected rf level) is 25 microamperes when the rf
bias voltage for lamp driver Q8. With lamp driver Q8
output (high) signal level is 20 milliwatts. The detected
turned off, the failure lamp DS1 is extinguished (normal
rf level is applied through main chassis low pass filter
condition). When the if output signal is not present or
1A14RL4 and applied to synthesizer position of meter
drops to a low level, the turn-off bias is reduced and
panel assembly 1A15A8 meter selector switch as a
lamp driver Q8 turns on causing the failure lamp DS1 to
synth level signal used to monitor output of electrical
light red (alarm condition). The failure lamp DS1 is
frequency synthesizer 1A14.
tested by pressing the TEST button on the electrical
frequency synthesizer 1A14 front panel. Pressing the
(2) Board A2. The rf output signal (between
TEST button applies 5 vdc to lamp driver Q8 producing
284.3750 MHz and 303.1250 MHz) from vco
a bias which over rides the turn-off bias and causes
subassembly Y1 is amplified by digital amplifier Q1 and
failure lamp DS1 to light. Voltage regulator diode CR,5
Q2 to a 1 milliwatt output level. The amplified rf output
on board A1 produces 6.2 vdc which is applied to rf
(low) signal, is applied to electronic frequency converter
amplifier (Q4 and Q5), the divide-by-two circuit Q1
1A14A2. The amplified output signal from the digital
through Q3 and lamp driver circuit Q8.
amplifier Q1 and Q2 is detected by lamp detector diode
CR1 and applied to diode CR2 on board AS. The
c.
Variable Frequency Dividers 1A14A4 and
detected signal is then applied to lamp driver Q3 on
board A3. When the rf output level from the digital
amplifier is 1 milliwatt (normal condition), the detected
signal biases the lamp driver Q3 off causing the failure
(1) General. The variable frequency divider
lamp DS1 to be extinguished. When the rf output level
modules divide the if output frequency from 1A14A2 in
from the digital amplifier Q1 and Q2 drops below 1
accordance with the thumbwheel switch settings (4400.0
milliwatt (alarm condition), the lamp driver Q3 is biased
MHz to 5000.0 MHz) to produce the divide-by-N output
on causing the failure lamp to light red. The lamp is
pulses.
As stated previously, the variable divider
tested by pressing the TEST button on the electrical
circuits have the capability of dividing the if output
frequency synthesizer 1A14 front panel.
frequency by 16,000, but the divisor is limited to a
number from 9080 to 15080 by the thumbwheel switch
b.
Electronic Frequency Converter IA14A2
settings ((2) below). The thumbwheel switches provide
ground connections to the switch gate inputs of the
variable frequency divider modules in accordance with
frequency converter 1A14A2 consists of two printed
their settings (para 2-56a).
circuit boards A1 and A2 that translate the rf output (low)
The ground connections preset the number in the
signal from radio frequency oscillator 1A14A1 to an
associated registers. The 1000 MHz and 10 MHz
intermediate frequency which is applied to variable 1
thumbwheel switches preset the divide-by-eight ripple
frequency divider 1A14A4. The rf output (low) signal is
through counter registers in 1A14A5 with a number from
between 284.3750 MHz and is applied to a divide-by-
4 to 7. The 10 MHz thumbwheel switch presets the 10
two circuit consisting of Q1, Q2 and Q3 on board A1.
MHz divide-by-ten registers in 1A14A5 with a number
The divided signal (142.1875 MHz to 151.15625 MHz) is
from 0 to 9. The 1 MHz thumbwheel switch presets the
amplified by rf amplifiers Q4 and Q5 and applied to the
1 MHz divide-by-ten registers in 1A14A4 with a number
local oscillator input port of mixer Z1. The 8 MHz signal
from 0 to 9. The 0.1 MHz thumbwheel switch presets
from standard radio frequency oscillator 1A114A7 is
the 0.1 MHz divide-by-ten registers in 1A14A4 with a
applied to board A2 where it is multiplied by 16 through
number from 0 to 9. Variable 1 frequency divider
multiplier stages Q1, Q2, and Q3 producing a 128 MHz
1A14A4 also contains a circuit which divides the if
output signal. The resultant 128 MHz signal is applied
output frequency by two before it is applied to the 0.1
through emitter follower Q4 to the signal input port of
MHz divide-by-ten registers. The registers in both
mixer Z1 on board A1. The mixer Z1 output is the
modules count down the divided-by-two if output
difference frequency (14.1875 MHz to 23.5625 MHz) of
frequency until the count in the registers reaches unique
the two input signals to the mixer Z1. The 14.1875 MHz
numbers
to 23.5625 MHz if output signal is amplified through
video amplifiers Q6 and Q7 and applied to variable 1
2-36
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