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TM 11-5820-695-35
converts it to half baud for cable system compatibility.
(c) The traffic detector circuit of radio
The pcm signal is then combined with the orderwire
digital processor 1A12A10 generates signals ONOR and
signal and applied to the cable system.
1RPFAIL. When signal 1RPCM is normal, if the CABLE
(1) When the CABLE LOOP TEST switch
LOOP TEST switch is in NORMAL position, signal
(1A12A12AlS1) is in the NORMAL position, signals
1RPCM is gated through A7B and following circuits into
OTEST and OCLPCM are both logic one.  Signals
the secondary of T1.  Signal ONOR output from the
1RPCM (waveform A, fig. 638) and 1R2304 (waveform
traffic detector is then logic one, signal 1RPFAIL is logic
B) are combined by NAND gate A7B.  The full baud
zero, and the radio-to-cable pcm signal is transmitted
1RPCM signal is converted to half baud at the output of
through the cable. If the CABLE LOOP TEST switch is
A7B (waveform C, fig. 5-38). This signal is inverted by
then placed in TEST position, signal 1RPCM is inhibited
OR gate A4D (waveform D) and applied to pulse
at A7B (logic zero at pin 6) but signal OCLPCM is gated
generator A2, which is a monostable multivibrator.
through A4D.  Signals ONOR and 1RPFAIL are the
When the output of A4D goes negative (low), the output
same as above but now the cable loopback pcm signal
of A2 goes negative for 217 nanoseconds (1/2-baud),
is sent to the cable. When the radio-to-cable pcm signal
then returns to high (waveform E, fig. 5-38). The output
(LRPCM) fails, if the CABLE LOOP TEST switch is in
signal from A2 is inverted by A4C and applied to the
NORMAL position, there is no pcm signal into T1.
cable output amplifier (waveform F, fig. 5-38).
Signal ONOR switches to logic zero and signal 1RPFAIL
switches to logic one (traffic failure). There is no pcm
(2) In  the  cable-to-radio  direction  of
signal in the cable. If the CABLE LOOP TEST switch is
transmission, the pcm signal is sent to the modulator
then placed in TEST position, signal OCLPCM is gated
circuits of Transmitter, Radio T-1054/GRC-144 for
through A4D.
Signal ONOR is logic one, signal
transmission after being processed in digital data
1RPFAIL is logic zero and the cable loopback pcm
modem 1A12.  This signal, inverted (OCLPCM from
signal is sent to the cable.  The logic state of signal
cable digital processor 1A12A4), is applied to radio
ONφR affects operation of relay 1A12A-12A2TB1K1.
digital processor lA12A10.  When the CABLE LOOP
See e below.
TEST switch lA12Al5A1Sl is placed in the TEST
position, this from cable signal is substituted for the from
(4) Switch Logic. The switch logic circuits are
radio pcm signal through OR gate A4D. Thus, under the
for future application and are not used.
test condition, the signal from the cable is returned
c.1 .
Radio  Digital  Processor  1A12A16,
directly to the cable as a means of testing the cable
Asynchronous Mode.  (fig. 5-8.1 and 5-38.1).  Radio
system.
digital processor 1A12A16 receives the full baud,
(3) The pcm signal from A4C is amplified by
retimed pcm signal (LRPCM) from 1A12A9 and converts
cable output amplifier Q1 and transformer coupled to
it to half baud for cable system compatibility. The pcm
the cable circuit and the traffic detector.
signal is then combined with the orderwire signal and
applied to the cable system.
(a) There are three cable simulation
networks; each network provides attenuation equivalent
(1) The function logic switch determines the
to 1/4-mile of cable. They are added in the required
output signal provided by 1A12A16. When the CABLE
increments to make the total length of actual and
LOOP TEST switch (1A12A12A1S1) is in the NORMAL
simulated cable equal one mile.
A selector plug
position, signal OTEST is logic 1 and signal OCLPCM is
connects the required networks and also makes a
inactive and the input is a constant logic 1. When the
connection to the applicable CABLE LG (MILES)
CABLE LOOP TEST is in the TEST position, signal
indicators on the front panel. A similar arrangement is
OTEST is logic zero and signal OCLPCM is active.
provided for cable digital regenerator 1A12A2 (para 2-
(a) When signals OTEST, TC1 and
5a) such that when both special connectors are plugged
TC2 are all logic, the output of inverter A6D is logic 0.
in to simulate the same length of cable, the associated
The outputs of NAND gates A6C and A4B are then fixed
CABLE LG (MILES) indicator is lighted (para 2-39d).
at logic 1, and NAND gate A5A has logic 1 at two inputs
(b) At
the
secondary
side
of
(pins 1 and 2). NAND gate ASB has logic 1 at pin 8
transformer T1, the pcm signal is combined with the
(OTEST) and the 1RPCM signal is gated through A5B
orderwire signal and the cable direct current.  The
by the
overvoltage shunt circuit protects circuits of radio digital
processor 1A12A10 against input voltage surges from
the cable.
Change 2 2-20


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