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TM 11-4920-296-14&P
the output rf pulses is the same as that of
frequency/power signal is fed to the digital
the digital signals which control them. From
circuits, which also examine the reply
the rf module output, the rf pulses are fed
pulses for other parameters.
to the transponder under test (either via the
antenna, or via direct-connect cables),
2-25.  Other modes of the test set include
Upon completion of the transmission of out-
lamp-testing and self-testing modes. In the
put rf pulses, the encode cycle ends, and the
lamp-test mode, signal levels are applied to
circuits switch to their decode cycle.
the stages controlling the indicator lamps,
to cause them to light; if any lamp fails to
2-22.  During the decode cycle, rf reply
light during this check, it is possibly burned
pulse sets are received from the transponder
out, and maintenance actions are required.
under test.  In the rf module circuits, the
For the self-test mode operation, the digital
reply pulses are detected (demodulated) to
circuits generate special interrogation
produce video-type pulses, whose coding and
pulses and apply them to the rf module cir-
timing are that generated by the transponder
cuits, where they produce output of interro-
under test.  In the rf module, the frequency
gation pulses. The resulting rf output pulses
and relative power of the reply pulses are
are demodulated in the receiver stages, and
also checked.  The video pulses from the
fed to digital stages which check for known
parameters of the special self-test signals.
detector circuits are then fed to the digital
If all stages of the test set are operating
circuits, which now check the parameters of
coded reply pulses.
correctly, they will cause an ACCEPT indi-
The parameters
being checked include pulse timing, checks
cation during the self -test mode.
for extraneous or missing pulses, cor-
2-26.  The following discussions briefly
rect SLS action, etc. If all parameters
describe signals and actions occurring in
of the reply are correct (for the specific
the test set circuits, for various modes of
mode and code used for interrogation), the
operation. For these discussions refer to
digital circuits light an ACCEPT lamp on
figures 2-4 and 2-5 for timing diagrams of
the front panel.  Conversely, if any, param-
the various signals, and to the functional
eter is incorrect, the circuits light a
block diagram of figure 2-3. First, the dig.
REJECT lamp.
ital circuit operations (by modes) are dis-
2-23.  Actually, the ACCEPT or REJECT
cussed, followed by discussions of the rf
module, and the power supply circuits of
lamps are not lighted on the basis of a single
the test set.
testing cycle (encode and decode cycle).
Basic testing cycles are repeated at the rate
of 257 cycles per second.  This repetitive
2-27,  SIF MODES. For SIF mode testing,
encode-cycle signals are clocked at 1-MHz
cycling is required to determine if a trans-
rate (l-microsecond period), and decode-
ponder replies correctly to a specified per-
cycle actions are clocked at 690-kHz rate
centage of interrogations.  During testing,
(1. 45-microsecond period). When the TEST
the digital circuits determine the percentage
switch is placed at ON position during an
of correct replies (of the total number of
SIF mode test, the following actions occur.
test interrogations made), and light the
REJECT lamp if the transponder fails to
2-28.  At the beginning of the encode cycle,
meet the specified percentage.
a DATA pulse appears at U3-TP1, and is
2-24.  The rf module circuits also check the
loaded into a register, by the next-occurring
CLOCK pulse. This generates a To pulse
frequency and relative power of the reply
(at U2-TP4), which initiates the P1 interro-
pulses received from the transponder. If
gation pulse.  The DATA pulse is shifted
frequency and power are within specifica-
through the register stages (at the CLOCK
tions, a signal is fed to the digital circuits,
to cause lighting of the ACCEPT lamp. If
(U4-TP2) to initiate the P2 interrogation
either the frequency or power of the reply
pulse.  Farther down the register-stage
pulses is incorrect, the REJECT lamp is
During SYSTEM testing, the
chain, the DATA pulse is again tapped-out,

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