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TM 11-5825-271-34
b. Transistor Q3 and the associated components
of Q16 and, therefore the pulse width, also increase
(mark-space ration increases).
Conversely, if the
from a safety cut-off circuit which prevents over-
potential at the base of Q16 decreases, the conduction
dissipation in the pa module A1A4, should a malfunction
period of Q16 decreases, resulting in a corresponding
cause the mark/space signal to assume a steady mark
reduction of the mark/space ratio.
(high) condition. The input at TB 1-1 is filtered by Rl/C2
(1) The 65 kHz feedback signal from the pa
to produce a dc voltage cross C2 proportional to the
module A1A4is received at P1-8 This signal is smoothed
mark/space ratio. If this ratio exceeds 70% for a number
by R68 and C29, and compared with the dc reference at
of audio cycles at the lowest operating modulation
the cathode of zener diode CR33 When the feedback
frequency, the voltage across C2 becomes sufficient to
signal increases, the potential at the base of Q16 is
turn on Q3. As a result, Q2 switches off and drive to the
lowered through Q18 and the mark/space ratio is
pa module A1A4 is cut off
decreased correspondently
(2) The  tone  modulation  signal  (received
2-17. PA Module A1A4
through C30) and/or the voice modulation signal
(fig FO-7)
(received through C52) vary the potential at the base of
a. The pa module A1A4 provides the full-power,
Q18 (through Q16), with the result that the output at the
switched waveform at the carrier frequency, amplitude
collector of Q15 is modulated by the tone and/or voice
modulated by the output of the switched regulator driver
signal. Transistor Q17, which is fed from the rf current
detector in the power probe A1A6 at P1-9, is normally
b. The unregulated dc supply at P1-1 is applied,
off.  In the event of a short circuit at the transmitter
through F1 and filter L5/C7, to the collector of Q4. The
output, Q17 switches on and lowers the base potential of
65 kHz drive signal at P1-3, received from switched
Q16 to ensure that the rf current is kept within safe limits.
regulator driver A1A3, turns Q5 on and off which causes
l.  Keyer.  Refer to figure FO-5 (2).  Integrated
Q4 to switch on and off. The amplitude of the 65 kHz
circuit U1 is an oscillator/divider which divides the basic
square wave at the emitter of Q4 is equal to the
oscillator frequency (established by R1, R2, R3, and C1)
unregulated dc supply at its collector.  Diode CR5
by 1024. The output at pin 8 of U1 is a 10.24 Hz to 6.83
provides dc restoration by referencing the negative
Hz signal, corresponding to a repetition rate of 100 mSec
excursion of the signal to ground. Network L3, C5, C6,
to 150 mSec. This signal is used as the clock signal for
L4 and C4 filters out the 65 kHz switching frequency and
decade counter U2 which provides a four-count to the
produces the dc voltage used by Q2 and Q3 The
code selection matrix terminals B-G through the diode
amplitude of this dc voltage varies sinusoidally with the
array CR1-CR10. The +4 output at U2-10 is the clock
audio modulation
input for decade counters U3/U4. The Q outputs from
c.  The signal at the emitter of Q4 is routed through
U3/U4 provide a 12 count to the coding nand gates
CR7 and used as the feedback signal for the mark/space
U6/U7/U8.  The second input to each nand gate is
modulator in the exciter assembly A1A2. This feedback
received from the code matrix, terminals 1 through 12.
signal adjusts the mark/space ratio to compensate for
On the diode matrix, terminals B to G can be linked to
variations in the unregulated dc supply The CARR
terminals 1 to 12 to provide the coding required. Unused
LEVEL control RI0 (fig. FO-1) sets the feedback level
terminals between 1 to 12 are linked to terminal A
and, therefore, the carrier level.  To summarize, the
(ground). For a 2-letter code, the reset line is taken from
voltage at the center tap of T2, determined by CARR
U4-10 (link 2 installed, 48 bit operation). For a 3-letter
LEVEL control RO10, is compensated for changes in the
code, the reset line is taken from U4-9 (link 1 installed,
unregulated dc supply at P1-1, and varies in accordance
64 bit operation) Note that keyer circuitry is enabled only
with the filtered modulation signal. Indicator DS1 comes
when P1-1 is grounded by setting the TONE switch S3
on when the unregulated dc supply and the switched
(fig. FO-1) to key position.
regulator drive inputs are both present.
d. The dc bias supply for the driver Q1 is stabilized
2-16. Switched Regulator Driver A1A3
by CR1 and CR2. Transformer T1 provides a drive for
(fig. FO-6)
the push-pull output stage Q2/Q3 Diodes CR3 and CR4
a. The 65 kHz input signal at TB1-1 is the output
prevent reverse-current flow through the collector-base
from the mark/space modulator circuit in the exciter
junctions of Q2 and Q3. The rf output from Q2/Q3 is
assembly A1A2. This input causes Q1 and Q2 to switch
taken from the secondary of T2 and applied to the rf filter
on and off at the mark/space rate. The resulting current
A1A5 through P1-6.
drawn from the pa module A1A4, through TB1-3, causes
the switched regulator circuit in the pa module A1A4 to
also switch on and off at the mark/space rate.

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