SWEEP SYNTHESIZER (Part Number 5030- 1101)

TM 11-5820-918-13

cycle) phase-lock loop. Thus, in this example, while the integer cycle BCD counter

accumulates an additional 421 cycles every 10 microseconds, the residue generator

corrects the phase detector by O, .23, .46, .69, etc. cycles every 10 microseconds

to produce a VCO output frequency of 42.123 MHz or 23 kHz offset from an integer

100 kHz point. The ability of the residue generator to correct the loop is limited

only by the accuracy of the residue correction waveform. In the sweep synthesizer

assembly, this correction is made with sufficient accuracy to provide 2 Hz frequency

resolution with spurious signals typically greater than 50 dB below the fundamental.

4.22. SWEEP SYNTHESIZER (Part Number 5030- 1101) (figure FO-13) (refer to figure

4-3). The sweep synthesizer 1A1 is a modular, digitally controlled, phase-locked-

loop synthesizer that generates the linear RF sweep.

NOTE

The synthesizer module is used interchangeably in both transmit (TCS-

4B) and receive (RCS-4B) applications. A programming line in the in-

strument wire harness determines whether the synthesizer operates in

the transmit or the receive mode.

The sweep synthesizer module has five RF outputs: (1) the 42-70 MHz first mixer

L.O. injection for the receiver; (2) the 40 MHz second L.O. receiver injection; (3)

a buffered 5 MHz from which the receiver third mixer L.O. injection is derived; (4)

the 2.1- 3.5 MHz count output which is used by the frequency counter in the TCS-

4B transmit logic, or RCS-4B receiver control logic to drive the front panel LED fre-

quency display; and (5) the 2-30 MHz transmit sweep output which drives the TCS-4B

RF power amplifier or the RCS-4B receiver calibrator circuits. The one RF input to

the sweep synthesizer is the 5 MHz frequency standard signal from which all RF out-

puts are derived. The synthesizer digital inputs select parameters such as: sweep

rate and limits; sweep start, stop and reset ; RF blanking; slip; auto sync and RF

output power level. The module consists of three circuit card assemblies: synthesizer

1A1A1, down converter 1A1A2, and sweep programmer 1A1A3.

4.23. SYNTHESIZER (figures FO-7 and FO-8) (refer to figure 4-4). The 5053-2001

synthesizer circuit (1A1A1) is a digitally programmed, phase-locked-loop synthesizer

capable of generating any frequency between 42 and 70 MHz to 1 Hz resolution. It

consists of a 42-70 MHz VCO, a programmable divider (divide-by-N), a phase detector

and loop amplifier, and control logic (phase register and timing generator). Figure 4-4

is a simplified diagram of the circuit. A detailed functional block diagram is in figure FO-7.

a. The output frequency of the VCO (and the synthesizer) is determined by

electrically tuning the VCO with a control voltage from the loop amplifier. The loop

amplifier produces this control voltage by integrating (smoothing) the phase-error

signals generated by the phase detector. If there is no phase error, the output of

the phase detector is zero and the loop amplifier will hold the VCO at its existing fre-

quency. If there is a phase error the phase detector will drive the loop amplifier to

change the VCO frequency until the error is corrected. The synthesizer uses the

phase detector to compare the output of the divide-by-N counter with a fixed 100 kHz

reference signal. If the phase or frequencies of these two signals do not match, the

phase detector will drive the loop amplifier to adjust the VCO frequency until the

divide -by-N output exactly matches the 100 kHz reference, thereby achieving phase

lock. The VCO output frequency is always N times 100 kHz. There are N cycles

of the VCO output for every one cycle of the 100 kHz reference. If N is an integer

number, the VCO frequency will be an exact multiple of 100 kHz. However,

4-7