VARIABLE DIVIDER

TO 31R2-2GRC171-2

TM 11-5820-815-14

NAVELEX 0967-LP-544-5010

4-79. The variable divider functions by counting N

signal turns level shifter amplifier Q7 off. With Q7 off,

input cycles of the vco frequency to produce one output

+12 V dc applied through L10, L11, R17, C18, L8, CR3,

pulse to the frequency/phase detector. For the example

L7, and R15 to ground develops approximately 6 V dc at

frequency of 334.350 MHz, N would be 26,748 to give

the cathode of diodes CR2 and CR3. Zener diode VR1

12.5 kHz at the frequency/phase detector. Dividing

applies +5.1 V dc through C15 and L9 to the anode of

26,748 by the regenerative divider fixed division ratio of

diode CR2 causing CR2 to be back biased. This blocks

2, leaves a count of 13,374 to be counted by the

the synthesizer rf signal from being applied to the receive

remaining circuits of the variable divider. To accomplish

injection input to receiver rf module A3. Forward-biased

this, at the beginning of each count period. preset

diode CR3 allows the synthesizer transmit rf signal to be

pulses (waveforms G and W) preset the .+A

applied through C14 to the transmit rf input of power

programmable counter to a count of 14 and the +Np

amplifier module A8.

programmable counter to a count of 334. The 25-, 50-,

and 100-kHz frequency select information from the radio

4-75. In receive mode, a logic 1 key 2 signal turns

control (350 kHz for the example frequency) is preset

level shifter amplifier Q7 on. With Q7 on, +12 V de

into the . A program- mable counter to set its count at

applied through L10, L11, R17, R16, and Q7 to ground

14. It therefore requires 14 input pulses (waveform ) to

develops approximately 4 V dc at the junction of R16,

get one out- put pulse (waveform X). The 1-, 10-. and

R17, C18, and L8. This voltage is applied to the anode

100-MHz frequency select information (334 MHz for the

of diode CR3 through C18 and L8. Zener diode VR1

example frequency) is preset into the

applies +5.1 V dc through C15, L9, and CR2 to the

programmable counter to set its count to 334. For this

cathode of diode CR3. This back-biases diode CR3

counter, it requires 334 input pulses (waveform Z) to get

blocking the synthesizer rf signal from being applied to

one output pulse (waveform G). At the beginning of a

the transmit rf input of power amplifier module A8.

count period just following the preset pulses, the 2-

Forward-biased diode CR2 allows the synthesizer

modulus prescaler divides by 41 to produce one output

receive injection signal to be applied through C17 to the

pulse (waveform F) for every input pulse (waveform A).

receive injection input of receiver rf module A3.

The output pulse is fed to both the Np programmable

counter (waveform Z) and A programmable counter

4-76. When switching from receive mode to transmit

(waveform I). The A programmable counter counts 14

mode, current flows through CR3 to back-bais CR2. This

of these pulses after which time it feeds back a logic

results in some overlap where both diodes are on at the

control signal (waveform H) to the 2-modulus prescaler

same time (make before break). This prevents switching

to change its division ratio to 40. For the remainder of

transients from being reflected back through the power

the period, the 2-modulus prescaler divides by 40. As a

amplifier to affect vco frequency which could result if the

result of this, for the first 14 pulses counted by the Np

transmit/receive switch were to open while switching

programmable counter, the 2-modulus prescaler divides

(break before make). In a similar manner, current flows

by 41. For the remaining 320 pulses counted by the N

through CR2 to back-bias CR3 when switching from

programmable counter. the 2-modulus prescaler divides

transmit to receive mode.

by 40. The total number of input pulses to the 2-modulus

prescaler would therefore be 14 (41) + 320 (40) or

4-77. At the receiver injection output, capacitor C17

13,374 which is the desired count following the

and inductor L9 form a high-pass filter to attenuate 30-

regenerative divider. The output pulses (waveforms G

MHz spurious (if frequency) that may be present in the

and W) fed to the frequency/ phase detector are also fed

receiver injection signal.

back as preset pulses to preset the programmable

counter to start a new count period.

4-78. VARIABLE DIVIDER. Refer to figure FO-1l. The

variable divider consists of the regenerative divider, 2-

A programmable counter,

4-80. Regenerative Divider. Reference designators

modulus prescaler,

programmable counter, and various control logic. The

apply to digital section A2A7.

To divide the vco

simplified schematic diagram of the complete variable

frequency by 2, the regenerative divider circuit (figures

divider presented by figure FO-11 includes a timing

FO-19 and 4-6) employs a double balanced mixer, Z1,

diagram for radio control frequency of 334.350 MHz.

that mixes the incoming vco frequency with one-half the

Encircled letters appearing on the variable divider

vco frequency which is derived from the if output of the

simplified schematic diagram make reference to

double balanced mixer. The circuit operates as follows:

waveforms shown on the timing diagram.

The

RfamplifierQ3 amplifies the vco frequency and applies it

waveforms pictured are theoretical and may not appear

through transformer T1 to the rf port of double balanced

as square waves when measured with a wide-band

mixer Z1. The if output of mixer Z11 feeds rf amplifier

oscilloscope. In the text, reference to waveforms will be

Q4 whose output circuit is tuned by transformer T2 and

by letter, ie, waveform A, waveform B, waveform AB,

varactor diode CR2 to one-half the vco frequency. When

presetpulse G, etc.

starting up, frequency components at the mixer if output

that

4-18