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| TM 11-5820-695-35
Radio R-1467/C-144; separates the pcm signal from the
(9) Under normal operating conditions,
orderwire signal; reshapes and amplifies this signal and
the signals at U5D-12 and U5C-9 and -10 are logic 0,
applies output signals to 1A12A7 and 1A12A9
and the signal at U5D-13 is logic 1. U5D-11 and U5C-8
(1RSPCM-1 and 1RSPCM-2).
then apply logic 1 at U1B-4 and U1A-2, respectively.
When signals DATA (TO RADIO) at U9B-10 and DATA
(1)
Pcm recovery circuits.
(TO DGM) at U9A-2 are active, the signals at U9B-12
and U9A-4 are logic 0. U1C-8 then applies logic 0 at
U1B-5 and U9A-4 applies logic 0 at U1A-1. U1B-6 and
(a) Signal FRPCM is applied to
U1A-3 are then logic 0, signals TR FAIL and DT FAIL
differential amplifier Q1A, B which generates a signal
are logic 0 (normal), and status indicator CR3 is off. If
proportional to the difference between the input signal
the DATA (TO RADIO) signal fails, U9B times out and
and a fixed reference. Linear buffer 1 (Q2, Q3)
resets, and U9B-12 applies logic 1 at U1C-9. The
provides a signal with a low impedance source to drive
0HIBTR signal at U11C-10 is normally logic 1 (see chart
the following peak detectors.
The peak detectors
in para (5) above) so U1C-8 applies, logic 1 at U1B-5.
consist of two half-wave diode rectifiers and filter
Since the signal at U1B-4 is normally logic 1, the signal
circuits. The time constants of the filter circuits allow
at U1B-6 changes to logic 1 and signal TR FAIL is in the
the capacitors to charge to the positive and negative
fault state. The logic 1 from U1B-6 changes the signal
peak excursions of the input signal.
at U8B-4 to logic 0 and indicator CR3 turns on. In a
similar manner, failure of the DATA (TO DGM) signal
(b) The detected signals are
changes the DT FAIL signal to logic 1 (fault) and lights
applied to a voltage divider which derives the algebraic
indicator CR3. U50 has two logic 1 inputs and logic 0
average of the peak-detected voltages. Linear buffers 2
output (U5D-11) only when signal DGMDEF is logic 1
and 3 (Q4 and Q5) provide a high impedance buffer
(fault) and LOOP TEST switch is not in RADIO position.
between the peak detector circuits and the input of
For this condition, U1B is inhibited and a TR FAIL fault
voltage comparator A4.
Voltage comparator A4
indication cannot occur. U5C has two logic 1 inputs only
compares the inputs from linear buffers 2 and 3. The
when signal DGMDEF is logic 1 (fault) and LOOP TEST
output of linear buffer 3 (Q4B, Q5B) is the reference
switch is in DGM position. For this condition, U1A
signal for the voltage comparator. When the amplified
inhibits a DT FAIL fault indication.
FRPCM output of linear buffer 2 (Q4A, Q5A) is more
positive than the reference, the voltage comparator
output is high; when the amplified FRPCM signal is
2-6. Digital Data Modem 1A12 Radio-to-Cable
more negative than the reference, the voltage
Circuits Functional Block (fig. 5-8 and 5-8.1)
comparator output is low. The output signal from the
voltage comparator is the reshaped pcm signal.
The functional relationships between the radio-to-cable
plug-in components and chassis circuits in digital data
(c) Digital buffer A3A inverts the
modem 1A12 are shown in figure 5-8 for the
output (pcm signal) of the voltage comparator for
synchronous mode and in figure 5-8.1 for the
application to digital buffers A3B and A3C. These
asynchronous mode.
Each plug-in component is
reinvert the signal and provide parallel outputs
functionalized and the main signal paths (heavy lines
(1RSPCM-1) and 1RSPCM-2).
through each plug-in component and between plug-in
components) are shown. In addition, the control and
(d) The output signal of digital
alarm functions are shown. The operation of the
buffer A3C (1RSPCM-2) is also connected to transition
synchronous mode plug-in components is described in a
detector 1 (A9) which is a monostable multivibrator.
through h and the operation of the asynchronous plug-in
Each time monostable multivibrator A9 is triggered by
components is described in b.1, c.1, and i.
the negative-going transition of a logic one and holds for
350 microseconds (approximately). If A9 receives
a.
Radio Digital Regenerator 1A12A8 (fig. 5-8
another trigger
the pcm plus orderwire signal (FRPCM) from Receiver,
Change 6 2-16.14
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