Digital Randomizer 1A12A3

TM 11-5820-695-35

status, these conditions reverse and CR2 turns on.

status and signal 1CFFL is the reverse. For the normal

Signal OMARY is routed through P1-14 to ,orderwire

status, these signals cause CABLE to RADIO MODEM

assembly A13 and applied to module A13A2 (para 2-8).

Indicator 1A15A8DSl (green) to light and 1A15A8DS3

(red) to be off. For the fault status, the indicator

Signal DOM (P1-T) is an input signal from LOOP TEST

conditions are reversed. The input signals at U8C are

switch 1A12S3 and from AVOW switch 1A1252. When

all normally logic 1 as discussed above (U6E at U8C-

S3 is in OFF position and S2 is in NORMAL position,

11), in (1) above (U8C-10) and in paragraph 2-6.1a

signal DOM is logic 1 and has no effect. If S3 is placed

(U8C-9). Thus, normally U8C-8 is logic 0 and U10A-3 is

in either DGM or RADIO position or if S2 is placed in

logic 1. The signal at U10A-1 is normally logic 1 ((2),

BYPASS position, signal DOM is logic 0. Signal

above). When U10A-3 is logic 1, the +5 VDC supply

OMARY is then clamped to ground (logic 0) and

charges capacitor C6 through R1 and R2 and applies

indicator CR2 turns on. Signal OMARY is also clamped

logic 1 at U12F-6. Logic 0 at U12F-11 provides a

to ground if signal FR FAIL is in fault status. Relay K1

ground from the coil of relay K2 and K2 is energized

is then energized (para 2-5.2 below), and ground is

(normal). Contacts 1 and 3 of K2 are then open and a

applied to U12E-12/P1-14 from K1-6 and 7.

logic 1 (open circuit) signal is routed through P1-R and -

S to the OCU. When the FR FAIL signal at U10A-1 is

Digital Randomizer 1A12A3 (fig. 5-8.2 and

normal (logic 1), if any input signal at U8C switches to

5-38.5). Digital randomizer 1A12A3 is comprised of a

fault status (logic 0), U10A-3 switches to logic 0.

scrambler circuit that operates on the data signal in the

Capacitor C6 then discharges through R2, and after a

transmit direction, a descrambler circuit that operates on

slight delay, the signal at U12F-6 is logic 0 and at U12F-

the data signal in the receive direction, and monitor

11 is logic 1. Relay K2 is deenergized and the logic 0

circuits. An INHB/OPR Jumper plug P2 on the digital

(closed circuit) at P1-R and -S indicates fault status.

randomizer inhibits scrambler and descrambler circuits

when the AN/GRC-144(V)3 or (V)4 operate with radio

(4) The signal (TFC IN) from U11B-4 ((1)

sets without randomizer circuits. The purpose of the

above) is inverted in U12C so signal 1CTFL is normally

scrambler is to change the characteristics of the transmit

logic 0. TFC-IN is twice inverted in U11A and U12D so

data stream so that the probabilities that any bit will be a

OCTFL is normally logic 1. These signals are routed

logic 1 or logic 0 are approximately even (509). Since

through P1-15 and -16 to external monitoring locations.

the transmit data signal is ac coupled to the radio

The signals at U8A-2 and -13 (paragraphs (1) and (3)

modulator, if a long string of 1's or 0's occurs, the

above) are normally logic 1. The signal at U8A-1 is a

average level of the signal varies substantially and

radio-to-cable signal (para 2-6.1a) and is normally logic

causes the modulator to drift. Also, in the receive

1. Operation of +5 VDC through R3, R4 and C7 with

direction, recovery of the clock signal depends on

logic states at U8A-12 is similar to that described for

detection of data signal transitions; scarcity of transitions

U10A in (3) above. For normal status U8A-12 is logic 0,

makes the recovered clock signal less dependable. So

U12E-12 and signal OMARY are logic 1 and indicator

the scrambled transmit data signal, with logic 1 and

CR2 is off. If any input at U8A changes to fault (logic 0)

logic 0 distribution approximating

Change 6 2-16.6