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| TM 11-5820-695-35
signal at U10B-6 is in fault status (logic 0) only when
This enables U6C to pass the 16 kHz signal which is
EPT FAULT is logic 1 (fault) and signal DGMDEF is
then multiplexed with the CONDITIONED DOW signal.
logic 0 (normal).
(10) Action of the other activity detectors is
(2) Signals TR FAIL, CDOW FAIL, and
similar to that described in (9) above for DVOW and
XMT PLL LOCK are monitored by the IC's shown in the
U12A. In summary, the monitor circuits produce the
chart below. The status of these signals is summed at
following actions.
U2B-6. The chart shows the logic states of indicated
IC's for three conditions of the monitored signals and for
(a)
If DVOW fails both indicators
both positions of LOOP TEST switch 1A12S3. As the
CR1 and CR2 light.
chart indicates, when the LOOP TEST switch is not in
RADIO position, U5C is inhibited and U5A is enabled.
(b) If a known DVOW failure exists
Then U5A-12 indicates a fault (logic O) only when EPT
at the OCU, a logic 1 is sent on the DVOW line and no
FAULT signal at U5A-1 is logic 1 (normal). When
fault indications occur.
LOOP TEST is in RADIO position, U5A is inhibited and
U5C is enabled. Then U5C-8 indicates a fault (logic 0)
(c) If a CVDOW, DVCLK or 8
only when the FR FAIL signal applies logic 1 (normal) at
KBPS DOW failure occurs, the corresponding activity
U5C-10. Thus the summary signal at U2B-6 is normally
detector causes the functional fault (CR2) indicator to
logic 0. When one of the monitored signals at P1-A, -3
light.
or -E fails (logic 1): 1. Logic 0 at USA-12 switches U2B-
6 to logic 1 (fault) if LOOP TEST switch is not in RADIO
(d)
Whenever CR2 lights, CDOW
position and EQPT FAULT signal is normal; or 2. logic
FAIL is logic 1.
0 at U5C-8 switches U2B-6 to logic 1 (fault) if LOOP
TEST switch is in RADIO position and FR FAIL signal is
b.
Combiner, Alarm-Status 1A12A2 (fig. 5-8.2
normal. FR FAIL is a radio-to-cable monitor signal and
and 5-38.4). Cable-to-radio input signals to combiner,
it is discussed in paragraph 2-61a.
alarm-status 1A12A2 are: EQPT FAULT (P1-M, from
module A4); )GMDEF (P1-U, from module A4); TR FAIL
(3) The signal from U2B-6 is inverted in
(P1-E, from module A4); CDOW FAIL (P1-A, from
U7B and routed to meter panel 1A15A8 through P1-J.
module Al); and XMT PLL LOCK (P1-B, from module
The signal is also inverted in U6E and applied to U8A-
A3). These signals are logic 0 (normal) or logic 1 (fault).
13, U8C-11 and U7A-1. The signal at U7A-16 is routed
A control signal (BBLB, P1-1) from LOOP TEST switch
to 1A15A8 through P1-K. Thus signal OCFFL is logic 0
1A12S3 is logic 1 (normal) when 1A12S3 is not in
for normal status and logic 1 (open circuit) for fault
RADIO position and logic 0 when 1A1253 is in RADIO
position. Module A2 monitors these cable-to-radio
signals and generates output status signals that are
LOOP
Monitored Signal
U5A
U5C
TEST
U4D-13
routed to meter panel 1A15A8, to orderwire assembly
Switch
Status
or
U4C-10
1
2
13
12
9
10
11
8
1A13, and to external monitoring locations.
Inhibited by logic O at pin 9.
1
1
0
1
Normal
1
Not in
U5C-8 is logic 1.
0
1
1
1
0
RADIO
Fault
(1) The EQPT FAULT signal is applied to
1
1
1
0
0
Fault
Positio
U11B-3, U10B-5 and U5A-1. Inverter U11B applies
n
IN
Normal
1
Inhibited by logic O at pin
1
1
0
1
logic 1 (normal) or logic 0 (fault) at U8A-2 ((4), below).
RADIO
Fault
0
2. U5A-12 is logic 1.
1
1
1
0
Positio
Fault
0
1
0
1
1
When signal DGMDEF is logic 0 (normal), logic 1 at
n
U10B-4 enables U1OB. When signal DQMDEF is logic
1 (fault), logic 0 at U10B-4 inhibits U10B. Thus the
Change 6 2-16.4
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