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| TM 11-5820 -509-35
the output circuit to the load. For example, if the output
rectifiers CR26 through CR29 supply unfiltered 26.5
voltage of the regulator begins to rise, current through
volts dc at terminal P1-22. In addition, filtered +24 volts
the base-emitter circuit of Q2 will also increase. The
dc and regulated and filtered +20 volts dc are also
resulting voltage drop across resistor R19 lowers the
available from this circuit. During the transmit period,
potential at the base of Q 1 and reduces the conduction
push-to-talk relay K1 is energized by a ground placed on
current in this transistor. The decrease in collector-
the push-to-talk (ptt) key line (P1-11). As K1 contacts
emitter current flow in Q1 results in a corresponding
close, ac primary power is applied to terminals I and 5
decrease in conduction current in series regulator Q3.
on high-voltage transformer T1. Voltage step-up occurs
This reduces the output voltage of the regulator
in all secondary windings of this transformer except
terminals to near its steady-state value. The output
those identified by terminals 12, 13, and 14. This
voltage of the regulator is adjusted by setting
winding is used to power the vacuum-tube filament
potentiometer R22 while monitoring the output voltage
circuits and is a step-down winding. The rectifier filter
at tip jack J8.
circuits associated with the secondary windings of high-
voltage transformer T2 are conventional. The negative
potential furnished by bias rectifiers CR1 through CR4 is
2-13. Radio Frequency Oscillator O-l032/PRC-47
filtered by the resistance-capacitance network consisting
(A8A6) (fig. 7-13)
of R1-C1. The resulting output voltage is divided to
permit independent control of the-110-volt dc and the-
a. The temperature-compensated crystal oscillator
32-volt dc grid bias potentials required for operation of
circuit provides a highly accurate stabilized oscillator
power amplifier V101 and driver A3V3. Potentiometers
frequency of 3.000 MHz.
This circuit consists of
R3 and R4 provide moderate adjustment of these levels.
transistor Q1 in association with the crystal, inductor L1,
b. When a dc primary power source is connected
and voltage-controlled capacitor C12. Low values of
to the receiver-transmitter, P1-22 becomes +26.5 volts
crystal drive (approximately 10 microwatts) are
dc input for the low-voltage circuits. Transformer T2
maintained to enhance the long-term stability and to
remains deenergized with the dc power source
insure that the self-rectified voltage appearing across
connected, but filter C25-L1-C26 and the associated
C12 remains below the minimum required for
regulator network are used to provide +24 volts dc and
compensation over the entire operating temperature
regulated +20 volts dc to the connected circuits just as
range.
As the ambient temperature varies over
in the case of ac operation. The power oscillator circuit,
considerable limits, crystal frequency drift is maintained
located in the main chassis of the receiver-transmitter,
below 35 parts-per-million (ppm). Compensation for
operates as an inverter that provides a 26.5-volt
aging effects in the crystal circuit is provided for by
squarewave voltage to terminals 2 and 4 of high-voltage
variable capacitor C1. This device permits adjustment
transformer T2. Terminal 3 on this primary winding
of the output frequency by approximately +4 ppm. The
provides a convenient means for applying power to the
correction voltage supplied to voltage.
variable
power oscillator and the insertion of push-to-talk relay
capacitor C12 is derived from the temperature-sensitive
K1 contacts in this lead permits proper control during
network consisting of thermal resistors RT1 through
transmit periods.
RT3, and resistors R1 through R6, and R18. The effect
c. The filtered +24 volts dc from the low-voltage
of rapid ambient temperature changes on the output
power supply circuit is applied to the voltage regulator
frequency of the temperature-compensated crystal
input. Zener diode CR31 and resistor R20 provide a
oscillator is minimized by the encapsulation of the
reference voltage at the emitter of transistor Q2. The
crystal and its compensating network within a foam
base of this transistor samples the fluctations in output
insulating block. Amplifier Q2 and follower Q3 isolate
voltage that appear at the wiper of potentiometer R22,
the crystal oscillator circuit from variations in loading.
and these variations are amplified by Q1 and Q2 to
b. The 3.000-MHz output of the temperature-
provide a control bias that controls series regulator Q3.
compensated crystal oscillator is applied to a frequency
Variations in the bias applied to Q3 produce variations
divider circuit. Locked oscillator Q4 provides an output
in the collector-emitter current flow of this transistor, and
that is one-sixth of the input frequency but remains in
have an effect similar to the addition or removal of a
synchronism with this input signal.
The natural
series resistance in
frequency of locked oscillator Q4 is determined by the
network consisting of capacitors C13 through C16 in
2-28
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