Audio Signal Circuits (Receiving)

TM 11-5895-1141-34

(3) Audio Signal Circuits (Receiving). Refer to figure FO-17. Signals from the channel receiver enter at pins P1-15,

16 and are coupled via transformer T1 and capacitor C2 to JFET transistor switch Q2 which, when its gate voltage is high

(+12 v) is turned on and passes the signal onto the base of transistor Q5. The gate voltage is controlled by the interlock

bus at P1-14 which is low when the channel's transmitter is being keyed. If keying is taking place, received signals are

blocked by Q2. The output of Q5 is then fed, via capacitor C7 and resistor R22, to the arm of switch S1 which may be set

to deliver the resulting signal current to either the headset amplifier bus at P1-7 or the loudspeaker amplifier bus at P1-8.

(4) Syllabic Indicator Lamp Driver. Refer to figure FO-17. Received signals present at pins P1-15, 16 are also fed

to buffer amplifier stage transistor Q1 via adjustment potentiometer R3 which permits as much as 20 dB of attenuation to

be introduced. The output of transistor Q1 is coupled via capacitor C3 to emitter follower Q3. The lamp driver transistor

Q4 is biased just below the threshold of conduction by R16 and R17. When the signal level becomes sufficient to cause

conduction of diode CR2 on the positive excursions of the Q3 collector voltage, capacitor C5 receives additional charge,

and the base current of Q4 increases. This causes the lamp DS2 to glow perceptibly. On the negative excursions of the

Q3 collector signal voltage, capacitor C4 receives charge through CR1 in such a direction as to further increase the base

current of Q4. The diodes CR1, CR2 and capacitor C4 thus provide a voltage doubler action which increases the DS2

lamp intensity to a clearly visible level during the presence of receiver audio. Increased signal levels cause a

corresponding increase in lamp intensity up to a point where Q4 saturates and the lamp is at full intensity. Potentiometer

R3 determines the audio signal level required to bring the lamp to full brightness. The term syllabic rate derives from the

fact that capacitor C5 charges to a peak value during the presence of receiver audio roughly coincident with the presence

of syllables of speech and then discharges quickly through R17 and the base of Q4, the visible effect in the lamp

appearing to flash at a syllabic rate.

(5) Interlock Circuits. Refer to figure 2-8. When switch S2 is moved to either the LOCK or NONLOCK position, the

push-to-talk bus at P1-5 is extended to operational amplifier stages U1B and U1C. These stages are operated without

feedback. Under this condition, small differences in current at the two input terminals causes the output to swing either to

ground or +24 v level. That is, these devices now operate as comparators. When there is no path to ground on the P/T

bus the (-) input terminals of U1B and U1C receive more bias current than do the (+) terminals. The result is, the outputs

of these amplifiers are forced low (zero volts) and the transistors Q8 and Q9 driven by these outputs, remain off. The busy

tone is disabled and the transmitter status bus remains high, both of which are consistent with an open path through either

S2 or the P/T switch. If we now close S2 and ground the P/T bus

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