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TO 31R2-2GRC171-2
TM 11-5820-815-14
NAVELEX 0967-LP-544-5010
When the +5-V dc switched voltage goes to 0 volt, bias
Antenna VSWR and PA/Antenna Power
voltage is removed from the linear rf amplifiers of the rf
Temperature Monitor.  Refer to figure FO-26.  The
predriver/ALC attenuator, A8A3. Removing +5 V dc from
antenna vswr comparator, U5A, detects antenna voltage
U5A and U5B causes the output of the antenna vswr and
standing-wave ratios that exceed about 3 to 1. Voltage
pa/antenna  power  comparators  to  remain  low,
developed across resistor R24 of voltage divider R17-
independent of their inputs.
R30-R24 sets a positive reference voltage at the
inverting input of U5A that is a function of the antenna
4-284. Logic 1 key 2 voltage applied to the base of time
forward power voltage (about 4 volts at 20 watts).
constant control transistor Q1 through resistor R85
Voltage developed across resistor R32 of voltage divider
causes Q1 to turn on. When Q1 turns on, the +12-V dc
R31-R43-R32 and applied to the noninverting input of
gate voltage that biased FET's Q6 and Q7 off is shunted
U5A is a function of the antenna reflected power voltage
to ground causing Q6 and Q7 to turn on. When on, Q6
(about 4 volts at 5 watts). Whenever the antenna vswr
provides a low resistance path in parallel with resistor
exceeds about 3 to 1, the reflected power voltage across
R63 and capacitor C12 (fast discharge path for C12).
R32 increases above the forward power reference
When on, Q7 provides a low resistance path across
voltage across R24. This causes the output of U5A to go
resistor R62. Together, the low resistance of Q6 and Q7
from low to high whenever the vswr exceeds 3 to 1.
changes the gain and time constant characteristics of the
Resistor R33 provides positive feedback (hysteresis) to
ALC differential amplifier, U6B.
the circuit. This prevents the antenna vswr comparators
from tripping more than once whenever the vswr is at the
4-285. The logic 1 key 2 voltage applied to the cathode
trip threshold. Resistor-capacitor networks R31-C15 and
of CR18 of the ALC precharge amplifier (U4B-Q5)
R17-C14 form low-pass filters to filter out high-frequency
reverse biases CR18 and allows the pa power output
interference (radar pulses) conducted into the circuit
reference voltage to be applied to the noninverting input
from the antenna.  When the antenna forward and
(through R87) of U4B. This causes the output of U4B to
reflected power outputs are both zero, positive voltage
go positive, turn on Q5, and apply a positive voltage to
(+12 V dc applied through voltage divider R16-R17-R30-
the noninverting input of U6B. ALC differential amplifier
R24) applied to the inverting input of U5A holds the
U6B compares the output of Q5 to the pa power output
output of U5A low.
reference voltage and develops an output voltage that
applied to the voltage divider formed by resistors R64,
4-287. The pa,/antenna power comparator, U5B, detects
R69, and R72.  The voltage across R72 is applied
pa to antenna power ratios that exceed about 2 dB.
through resistor R55 to the inverting input of U4B. The
Voltage developed across resistor R66 of voltage divider
closed-loop gain of U4B, Q5, U6B, and the voltage
R34-R66 sets a positive reference voltage at the
divider (R64-R69-R72) is such that the final voltage
noninverting input of U5B that is a function of the pa
(precharge voltage) at the noninverting input of U6B is
forward power voltage (approximately 1 volt at 20 watts).
just slightly above the level present when the receiver-
Voltage developed across resistor R40 of voltage divider
transmitter is keyed. The precharge voltage represents
R39-R40 and applied to the inverting input of U5B is a
a forward power slightly above the normal forward power
function  of  the  antenna  forward  power  voltage
output from the power amplifier.  When the receiver-
(approximately 4 volts at 20 watts). Resistor R66 is test
transmitter is keyed, the ALC circuit takes the precharge
selected so that whenever the pa power output exceeds
voltage as being the antenna forward power output even
the antenna forward power by more than about 2 dB, the
through the actual antenna forward power output is zero
pa forward power voltage across R66 just exceeds the
at that instance.
The ALC circuit processes the
antenna forward power reference voltage across R40.
precharge voltage to develop an ALC voltage that
This causes the output of U5B to go from low to high
causes the pin diode ALC attenuator to reduce the power
whenever the antenna power decreases such that pa
output at the same time as the rf power amplifier is
power output exceeds the antenna power by more than 2
turning on. The net result of this circuit action is to bring
Resistor  R35  provides  positive  feedback
the power output up in minimum key-on time (120
(hysteresis) to the circuit. This prevents the pa/antenna
milliseconds) and very little overshoot. The logic 1 key 2
power comparator from tripping more than once
voltage applied to the receive mode pa shutdown switch,
whenever the pa/antenna power ratio is at the trip
U2C, causes resistor R50 to be connected to ground
threshold.  When the pa and antenna forward power
through U2C to increase the gain of U4A-Q3- Q4. When
voltages are both zero, negative voltage (-12 V dc
this occurs, U4A amplifies the positive output voltage
applied through voltage divider R65-R66) applied to the
from U6B and drives the ALC voltage at the output of the
noninverting input of U5B holds the output of U5B to low.
ALC output amplifiers, Q3-Q4, to a high positive value.
This voltage, when applied to the pin diode ALC
4-288.  The overtemperature detector, U7B, detects
attenuator, causes maximum attenuation in the transmit
power amplifier heat-sink temperatures that exceed
rf signal path of the rf predriver/ALC attenuator, A8A3.
about 100 degrees Celsius. Thermistor A8RT1 (figure
FO-25) connected from P1-14 to ground forms a voltage
divider  with  resistor  R78.
For  low  heat-sink

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