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TO 31R2-2GRC171-2
TM 11-5820-815-14
NAVELEX 0967-LP-544-5010
converter. In addition, the 40-kHz timing signal provides
allows adjustment of the receive audio output from the
switching voltage to the -5.1-V dc converter to convert
radio set. The variable output of the headset volume
+12 V dc into a -5.1-V dc power supply voltage. When
control is applied to the headset gain input (A4P1-
the radio set is turned off (remote on/off line at ground),
22/A10J13-22) of audio module A4. The variable output
the dc- dc converter is in the standby state (startup
of the receive audio level control is applied to the main af
regulator turned off and the dc-dc converter output at 0
gain input (A4P1-T,/'A10J13-T) of audio module A4.
volt). Removing the ground from the remote on/off line
turns on the startup regulator and causes the voltage
monitor output to enable the pulse width gate. This in
power amplifier (U8A, Q16, and Q17 of figure FO-21)
turn enables the dc-dc converter to provide +26-V dc
amplifies the headset gain input signal to provide a 100-
regulated output voltage at its output. Once this occurs,
milliwatt minimum headset audio output signal to the
the 26-V dc output voltage is fed back (boot-strapped) to
headset when the headset volume control is set at
the dc power supply to develop the internally-used 25-V
maximum volume.  Capacitor C55 couples the input
dc output voltage.
signal through resistor R98 to audio amplifier U8A that
drives complementary output transistors Q16 and Q17.
4-185.  The following discussion assumes the dc-dc
Resistors R98 and R104 determine the power amplifier
converter has been on long enough to reach steady-
gain and improve crossover distortion of Q16 and Q17.
state regulation. Refer to the functional diagram of figure
Resistors R102 and R103 in the emitter circuit of Q16
FO-13. Regulation is achieved by remote sensing the
and Q17 provide thermal stability. Resistor R105 and
output voltage at the load.
The error amplifier
capacitor  C57  improve  high-frequency  stability.
(A5A1V4A) compares the remote sense voltage to a
Transformer T3 matches the output impedance of the
reference voltage to produce an output voltage sense
power amplifier to the 600-ohm load of the headset.
level (e).  Fluctuations in output voltage at the load
appear as changes in the voltage sense level (∆e error
voltages). The voltage comparator (A1U3B) compares
audio power amplifier (U8B, Q14, and Q15 of figure FO-
the voltage sense level to a ramp voltage generated by
21) amplifies the main af gain input signal to provide a
the  reference  ramp  circuit  (A5A1U5B,  A5A1Q13,
100-milliwatt minimum main audio output signal (into 600
A5A1VR11). To develop the ramp voltage, the reference
ohms) when the receive audio level control is set at
ramp circuit processes the 40-kHz timing signal and the
maximum level. The circuit functions identically to the
input voltage level to provide a ramp voltage with 40-kHz
headset power amplifier.  Diodes CR12 and CR13
timing and a slope that is a function of the input voltage
provide transient protection to the power amplifier
level.  This provides for input regulation of the dc-dc
against high-voltage noise spikes that may be present on
converter. By comparing the voltage sense level to the
the receive audio output lines from the radio set.
reference  ramp  voltage,  the  voltage  comparator
generates a 40-kHz output switching voltage. The duty
cycle of the switching voltage is a function of changes in
the dc-dc converter output voltage or changes in input
4-183. GENERAL. Dc-dc converter module A5 (figures
voltage. Refer to the function diagram of figure FO-13
FO-8 and FO-22) contains two dc-dc converters. One
for effects that changes in input or output voltage have
dc-dc converter is a switching regulator type converter
on the duty cycle. The output of the voltage comparator
that remote senses its output voltage to provide a
is inverted and applied to the pulse width gate
regulated +26-V dc voltage to power amplifier module A8
(A5A1U5A) where it is NANDed with the 40-kHz timing
and to other circuits of the receiver-transmitter.  The
signal and the logic 1 voltage monitor (A5A1U4B) output.
second dc-dc converter is a nonregulating, saturating
The positive edge of the resulting 40-kHz output signal
core type converter that provides +10 and -17 V dc to
moves right or left with respect to changes in dc-dc
voltage regulator module A6, and 100 V dc to rf filter
converter input or output voltages.  Approximately the
module A7.
last 4 microseconds of the positive half of the signal is
always held in logic 1. This is dead zone time which will
4-184.  The regulating dc-dc converter (figure FO-8)
be discussed later. The output of the pulse width gate is
functions as follows: When input voltage (+25 to +50 V
applied to the on-time switches (A5A1U1B, A5A1Q10,
dc unregulated) is first applied to the converter, the
A5A1Q11) and off-time switch A5A1Q17/Q12).  The
startup regulator develops a regulated voltage of about
negative edge of the signal controls the on-time
21 V dc from the unregulated input.  This voltage is
switches. The moving positive edge controls the off-time
applied to the dc power supply which develops +20 V dc,
switch. The moving positive edge, therefore, controls the
(goes to +25 V dc once dc-dc converter output goes to
on time to off time ratio of the output switching circuit
26 V dc), +12 V dc, and +5.1 V dc to power circuits
4-186. To understand how regulation is achieved, the
internal to the dc-dc converter module.  With voltage
switching  action  of  the  output  switching  circuits
applied, the 40-kHz multivibrator generates a 40-kHz
timing signal to provide basic timing for the dc-dc

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