FREQUENCY COUNTER

TM 11-5820-918-13

4-57. FREQUENCY COUNTER (figure FO-33) (S/N 400100 and before). A 2.11 -

3.60 MHz input from the synthesizer (1/20 of the synthesizer output before down con-

version) goes to terminal XF1 and is gated for two milliseconds into a 4-decade counter

(U4-U7) preloaded to 5980. The counters count up from 5980 the number of cycles

in the two-millisecond period. (For example, 2.11 MHz yields 4200 cycles in two mil-

liseconds which when added to 5980 yields 10200. The most significant digit (1) is

discarded and a frequency readout of 2.00 MHz is displayed. The resultant trans-

mit frequency is then latched for one counter cycle by latches U12-U15 and is then

switched to the display drivers via 2-to-1 multiplexer U20-U23.

4-58. FREQUENCY BLANKER (figure FO-33) (S/N 400100 and before). The frequency

blanker section provides the storage capability for 16 frequencies used to blank the

transmitter output. The transmitter output is blanked for 10 kHz about the stored

frequency. U30, U31, and U32 are 64-bit, random access memories in which sixteen

4-bit BCD numbers may be stored. The frequency to be blanked and one of 16 pos-

sible memory channels are entered by front panel thumbwheel switches. Pressing

the STORE switch with the RUN/PROG switch in the PROG (program) position enters

the frequency into the selected channel location. Each channel location may be ex-

amined to determine what frequency is stored by pressing the DISPLAY switch.

During operation, all 16 channels are sequentially addressed by U45 every 10 kHz

step to the synthesizer output frequency. U9, U10, U17, U19, U25, U35, U36, and

associated circuits form a 4-decade BCD subtracter which subtracts 10 kHz from the

stored frequency and compares that result with the counter frequency (which is a

10 kHz behind the actual transmit frequency) in U8, U16, U24, and U34. If both fre-

quencies are equal, a pulse (XBO) is sent to the synthesizer (U27 and U28, figure

FO-5). The synthesizer then waits until the next 10 kHz increment and blanks the

output for 20 kHz.

4-59. 5018 POWER SUPPLY (figure FO-34) (S/N 400100 and before). The power sup-

ply circuit accepts 115 or 230 VAC at 47-440 Hz and produces the following outputs:

115 VAC 60 Hz - three independent supplies for the rear panel-mounted cooling

fans;

+27 VDC - five independent supplies for driver and power amplifier circuits;

and

+5 VDC - one supply for the front panel power indicator lamp.

The AC line input from the rear panel is RF filtered by FL1 and presented to the pri-

mary of transformer T1 via an input voltage selector switch (SW1) . The selector

switch is factor wired to the 115/230-volt terminals of T1. Some variations of input

voltages can be accommodated by changing transformer connection points as indicated

by the values shown at the taps of transformer T1 primary. Also connected to the

primary side of T1 are the AC-to-AC converters. These units are separately filtered

and convert 107 VAC at 47-440 Hz to 115 VAC at 60 Hz. They provide constant cooling

fan speed regardless of the input line frequency. The secondary winding of T1 sup-

plies voltage to five full wave bridge rectifiers (CR1-CR5). These rectifiers supply

35 volts to the voltage regulators A1, A2, and A3. Regulators A1 and A3 supply

four independent 27 VDC inputs to the power amplifier; and A2 supplies one 27 VDC

input to the driver amplifier. A single output from A3 is also regulated by integrated

circuit U4 to produce +5 volts for the front panel power-on lamp. Each of the five

27 VDC regulators is also connected to separate integrated circuit voltage regulators

for current limiting and voltage control. The regulated output voltages are adjusted

by potentiometers R33, R35, R31, and R37, while short-circuit, current-limiting

4-19