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Page Title: DECODER/TIMER (7A3). Continued
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TM 11-5820-890-30-5 6-4. DECODER/TIMER (7A3). Continued The SWITCH STATUS, MAIN/STANDBY, and CM PRES lines are checked and the information is provided to the microcontroller  on  the  DATA  BUS.  The  STATUS  LINES  OUT  are  latched  as  directed  by  the  microcontroller. A   crystal   oscillator   on   the   decoder/timer   provides   several   clock   frequencies.   A   3.84-MHz   crystal   output   is divided by two to obtain 1.92 MHz. It is used by the microcontroller and logic circuits on the decoder/timer. It is divided  further  to  produce  640  Hz  and  320  kHz.  These  are  also  used  by  the  microcontroller. A  delay  circuit  holds  the  CLR-N  line  at  logic  0  for  about  1  second  when  the  control-monitor  is  turned-on.  After that,  it  is  held  at  logic  1.  It  is  used  to  reset  the  microcontroller  and  start  the  initialization  routine. Logic circuits convert the PROCESSOR Q signal into FSK DATA. Several control lines from the microcontroller are required  to  accomplish  this.  See  figure  6-3  and  figure  FO-17.  The  FSK  DATA  signal  is  a  2560/3200  Hz  square wave.  2560  Hz  is  a  logic  1.  3200  Hz  is  a  logic  0. OUT  3  STROBE  and  DMA  OUT-N  are  also  generated  for  use  by  the  microcontroller. 6-5. ANALOG MODULE (7A4). The analog module performs receive and transmit functions. See figure 6-4. Three radio channels are available for  receive  and  transmit.  A  channel  is  selected  by  the  radio  switch.  The  transmit  circuit  shapes  and  buffers  the FSK square wave signal from the decoder/timer. The receive circuit converts the analog FSK signal into a digital data   stream. The three transmit channels are identical except for the input control signal. For radio 1, the RADIO 1 XMT line goes to logic 1. This closes the appropriate transmit switch. The FSK DATA signal is from the decoder/timer. It is a  2560/3200  Hz  square  wave.  The  shaper/filter  circuit  converts  it  into  a  sine  wave.  This  FSK  analog  signal  is routed through the transmit switch to a buffer amplifier. It isolates the outgoing signals from the incoming signals. The  signal  is  transformer  coupled  to  the  radio.  Radio  2  and  radio  3  paths  operate  the  same  as  radio  1. The  receive  path  is  selected  that  corresponds  to  the  transmit  path.  For  radio  1,  the  RADIO  1  RCV  line  goes  to logic  1.  This  closes  the  appropriate  receive  switch.  The  received  signal  is  transformer  coupled  to  the  receive switch.  It  is  routed  to  a  buffer  amplifier.  The  buffered  FSK  signal  is  demodulated.  The  analog  data  signal  is converted into a digital data signal (RCV DATA). The RCV DATA signal is sent to the microcontroller. Radio 2 and radio  3  paths  operate  the  same  as  radio  1. When the FSK demodulator circuit detects a carrier, the 2880 DET-N line is pulled to logic 0. The RCV DATA signal is fed back into the analog module. It is used to maintain the frequency accuracy of the VCO and tracking of the received  analog  signal. The receive and transmit signals to a second control-monitor are also routed through the analog module. During transmit, the CM XMT line goes to logic 1. This closes the control-monitor transmit switch. The signal transmitted is the PROCESSOR Q signal. It is a 640-Hz digital data stream. It is routed through the transmit switch to a current driver. The current driver increases the current to the level required to drive the CM OUT line. A signal from the second control-monitor is input on the CM IN line. It is also routed through a current driver. The CM DATA signal is  output  to  the  microcontroller. 6-6


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