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Religion       TO 31R2-2GRC171-2
TM 11-5820-815-14
NAVELEX 0967-LP-544-5010
output current limit point will lower and cause the actual
voltage varies as a function of input voltage applied to
current limit to be about 12 amperes.
the dc-dc converter and the voltage sense level varies as
a function of the output voltage from the converter, the
4-201. INSTANTANEOUS CURRENT COMPARATOR
duty cycle of the voltage comparator output is a function
The instantaneous current comparator (A5A1U3A of
of variations in both input and output voltages.  The
figure FO-22) compares a current sense voltage derived
variable duty cycle signal, when applied to the output
from actual output current flow from the dc-dc converter
switching circuits, controls switching times to counteract
to a reference voltage that determines the instantaneous
the voltage variations that originally caused the change in
(peak) current limit of the dc-dc converter.
The
duty cycle.
instantaneous current reference voltage (about 2 V dc) is
developed through voltage divider action of resistors
4-200.  AVERAGE CURRENT COMPARATOR.  The
A5A1R46, A5A1R47, A5A1R48, and A5A1R70 and is
average current comparator (A5A1U6 of figure FO-22)
applied to the inverting input of A5A1U3A. The voltage
compares a current sense voltage derived from actual
divider sets the instantaneous current limit (about 20
output current flow from the dc-dc converter to an
amperes peak) higher than the average current limit. To
average current reference voltage that determines the
develop the instantaneous current sense voltage, current
average current limit of the dc-dc converter.  The
sense transformer A5T2 senses current flow through the
average current reference voltage (about 1.5 V dc) is
turned-on  output  transistor  switch  (A5Q2/Q3  or
developed through voltage divider action of resistors
A5Q4/'Q6). The resulting ac voltage from A5T2 is full-
A5A1R46, A5A1R47, A5A1R48, and A5A1R70 and is
wave rectified by diodes A5A1CR31 through A5A1CR34
applied to the noninverting input of A5A1U6. Resistor
and applied through diode A5A1CR53 to the noninverting
A5A1R47 is test selected to set the average output
input of A5A1U3A.  When the instantan-eous current
current limit of the dc-dc converter module to about 15
sense voltage (peak output current) exceeds the current
amperes.
To develop the average current sense
reference voltage (peak current limit), the output of
voltage, current sense transformer A5T2 senses current
A5A1U3A goes positive. Transistor A5A1Q14 inverts the
flow through the turned-on output transistor switch
positive voltage and applies a logic 0 voltage to the input
(A5Q2/Q3 or A5Q4/Q6). The resulting ac voltage from
of pulse width gate A5A1U5A. This causes the output of
A5T2 is full-wave rectified by diodes A5A1CR31 through
the pulse width gate to go to a logic 1 to turn off the
A5A1CR34 and applied to a fast attack-slow release
output transistor switch that is on at that instant. This
peak voltage detector composed of diode A5A1CR13,
circuit action will continue until the overload condition
resistor A5A1R67, and capacitor A5A1C39.  The dc
goes away and the peak output current becomes less
voltage developed across resistor A5A1R67 and stored
than the current limit.
by capacitor A5A1C39 is the average current sense
voltage and is proportional to the level of current flow
4-202. To prevent the voltage and current comparators
through the output transistor switches.  This voltage,
from tripping more than once per period of the 40-kHz
when applied through resistor A5A1R68 to the inverting
timing signal, diode A5A1CR47 makes the comparator
input of A5A1U6, is compared by A5A1U6 to the average
circuit self-latching.  When the output of either the
current reference voltage.  When the average current
voltage comparator or current comparator goes positive,
sense voltage (output current) is less than the average
the positive voltage is fed back through A5A1CR47 to the
current reference voltage (output current limit), the output
noninverting input of A5A1U3A. This latches the output
voltage from A5A1U6 is positive enough to reverse bias
of A5A1U3A positive. The latch is reset by the 40-kHz
diode A5A1CR14. With A5A1CR14 reverse biased, the
timing signal during dead zone time. Application of the
output of A5A1U6 has no effect on the input voltage to
0-voltage portion of the 40-kHz timing signal to the
A1U3B. As the output current increases and approaches
strobe input of A5A1U3 (pins 2 and 8) forces the output
the current limit point, the increase in average current
of A5A1U3 to 0 volt independent of its inputs.
sense voltage causes the output of A5A1U6 to become
less positive and forward biases A5A1CR14.  With
4-203.
PULSE WIDTH GATE.
Pulse width gate
A5A1CR14 forward biased, the output of A5A1U6 takes
A5A1U5A NANDs the inverted (by A5A1Q14), variable
control of the voltage sense level input to voltage
duty cycle signal from the output of the voltage/current
comparator A5A1U3B. When this occurs, output current
comparator (A5A1U3) with the 40-kHz timing signal and
flow, as opposed to output voltage level, controls the duty
the voltage monitor output signal. Whenever the output
cycle of the voltage com- parator output. Any additional
of the voltage monitor is valid (logic 1), A5A1U5A applies
increase in output current flow causes the duty cycle (on
the variable duty cycle signal to the output switching
time of output switching transistors) to decrease. The
circuit. During the logic 0 portion of the variable duty
reduction in duty cycle lowers the output voltage and
cycle signal, one of the output transistor switches
causes the average output current to start limiting at
(A5Q2/Q3 or A5Q4/Q6) is on the length of time
approximately 15 amperes.  Due to resistor A5A1R75
determined by the width of the logic 0 pulse. During the
feeding back output voltage to the current reference
logic
1
portion
of
the
variable
duty
input
to
A5A1U6,
the
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