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TO 31R2-2GRC171-2
TM 11-5820-815-14
NAVELEX 0967-LP-544-5010
4-192. 40-kHz MULTIVIBRATOR.  The 40-kHz multi-
down the dc-dc converter until the overvoltage condition
vibrator (A5A1U2) generates an asymmetrical, nominal
is removed. Resistor A5A1R41 is test selected to set the
40-kHz output waveform to provide basic timing for the
trip lever at 64 0.5-V dc input voltage.
dc-dc converter.
Resistor A5A1R39 and capacitor
A5A1C29 set the low-level time of the waveform to about
4-196.
ERROR AMPLIFIER.
The error amplifier
4 microseconds. Resistors A5A1R38 and A5A1R39 and
(A5A1U4A of figure FO-22) compares the remote
capacitor A5A1C29 set the high-level time to about 21
sensed dc-dc converter output voltage to a reference
microseconds. Resistor A5A1R38 is test selected for an
voltage developed across zener diode A5A1VR12 (about
output frequency of 39.2 to 40.8 kHz.
6.2 V dc). The amplified difference voltage determines
the voltage sense level at the input to voltage comparator
4-193.
-5.1-V DC CONVERTER.
The -5.1-V dc
A5A1U3.
For nominal input voltage to the dc-dc
converter (A5A1U1A, A5A1Q6, A5A1Q7, and A5A1Q8 of
converter, the voltage sense level determines the
figure FO-22) converts the 12-V dc power supply voltage
quiescent output voltage from the dc-dc converter. Test
to a -5.1-V dc power supply voltage. Flip-flop A5A1U1A
select  resistors  A5A1R53  and  A5A1R54  allow
receives the 40-kHz timing signal to produce a
adjustment of the error amplifier gain to set the voltage
sense level for 26 0.15-V dc at the dc-dc converter
symmetrical, 20-kHz switching voltage to the base of
transistor A5A1Q8. This switches A5A1Q8 on and off at
output. Fluctuations in output voltage appear as error
the 20-kHz rate which, in turn, alternately switches
voltage around the voltage sense level. At the input to
transistors A5A1Q6 and A5A1Q7 on. When A5A1Q6 is
the voltage comparator, diode A5A1CR52 clamps the
on,  capacitor  A5A1C19  charges  through  diode
maximum voltage sense level to about +5.7 V dc. Diode
A5A1CR25 to approximately 10 V dc. When A5A1Q7 is
A5A1CR51 clamps the minimum voltage sense level to
on, A5A1C19 discharges through A5A1C20, A5A1R16,
about -0.6 V dc.  Resistor A5A1R49 and capacitor
and A5A1CR24. This action causes A5A1C20 to charge
A5A1C34 provide lag for closed-loop stability.
toward -10 V dc.  Zener diode A5A1VR9 clamps the
output to about -5.1 V dc.
4-197. VOLTAGE COMPARATOR AND REFERENCE
RAMP. The voltage comparator (A5A1U3B of figure FO-
4-194.  VOLTAGE MONITOR.  The voltage monitor
22) converts voltage changes at its input into a variable
(A5A1U4B, A5A1Q9, and A5A1VR10 of figure FO-22)
duty cycle waveform that drives the output switching
compares power supply voltages to produce a validity
circuits to maintain regulation. The variable duty cycle
signal (logic 1) to enable the pulse width gate
waveform is generated by comparing the voltage sense
(A5A1U5A).  In addition, the voltage monitor monitors
level from error amplifier A5A1U4A to the positive ramp
the remote on/off line and 25- to 50-V dc unregulated
voltage developed across capacitor A5A1C33 of the
input line. With the remote on/off line open and all power
reference ramp circuit (A5A1Q13, A5A1U5B).
supply voltages valid, the output of A5A1U4B is low
(approximately -3.6 V dc).  This back-biases diode
4-198. To develop the ramp voltage, A5A1U5B inverts
A5A1CR55 causing transistor A5A1Q9 to be turned off.
the 40-kHz timing signal to provide a nominal 40-kHz
The positive collector voltage of A5A1Q9 back-biases
switch voltage at the base of A5A1Q13.  The 40-kHz
diode A5A1CR49 and A5A1CR50 and enables pulse
timing signal causes the A5A1Q13 to turn on for about 4
width gate A5A1U5A.
If a power supply voltage
microseconds and off for about 21 microseconds. When
becomes invalid, the output of A5A1U4B goes high
A5A1Q13 turns on, A5A1C33 discharges rapidly to
(approximately 10 Vdc). This forward biases A5A1CR55
ground through diode A5A1CR48.  When A5A1Q13
to turn on A5A1Q9. When on, A5A1Q9 forward biases
turns off, the dc-dc converter input voltage applied
A5A1CR49 and A5A1CR5[0] and inhibits pulse width
through resistors A5A1R44 and A5A1R45 charges
gate A5A1U5A to shut down the dc-dc converter.
A5A1C33 for about 21 microseconds. Since the RC time
Forward-biased diode A5A1CR50 discharges capacitor
constant of the charge path is about 88 microseconds,
A5A1C34 to decrease the voltage sense level to about 0
the  voltage  developed  across  A5A1C33  for  21
V dc. Forward-biased diode A5A1CR49 decreases the
microseconds approximates a ramp voltage. The slope
current reference voltage to about 0 V dc.  Reducing
of the ramp voltage is a function of the dc voltage level
these voltages to near zero allows the output of the dc-dc
applied to the input to the dc-dc converter. Zener diode
converter to come up slowly once the fault is removed.
A5A1VR11 limits the maximum ramp voltage to about
Capacitor  A5A1C23  and  resistors  A5A1R24  and
6.2 V dc.
A5A1R25 form a fast attack-slow release time for
momentary faults.
4-199. By comparing the voltage sense level to the ramp
voltage, the voltage comparator (A5A1U3B) generates
4-195. Zener diode A5A1VR10 monitors the 25- to 50-V
an output waveform that changes from low level to high
dc unregulated input voltage.  Input voltages which
level at the point where the ramp voltage level equals the
exceed about 64 V dc cause A5A1VR10 to conduct and
voltage sense level. Refer to waveforms of figure FO-13.
forward bias A5A1Q9. This turns A5A1Q9 on to shut
Since
the
ramp
4-36


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