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Page Title: Receiver, Radio R-1467(P)A/GRC-144 (V) Demodulator 2A4 Circuit Functioning
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TM 11-5820-695-35
from the resonant frequency of transformer T1, a dc
b. Limiter input matching circuitry, consisting of
component is present in the output of the frequency of
inductor L6, resistor R20 and common emitter amplifier
transformer T1, a dc component is present in the output
Q3, provides impedance matching between the low pass
of the frequency discriminator at the junction of R40 and
filter and the limiter stages. Test point E8 serves as a
R41. The dc level/ depends on the frequency offset,
matched impedance point for alignment checking.
and the polarity on whether the if frequency is above or
Transistors Q3, Q4 and Q5 are common emitter limiter-
below the resonant frequency of transformer T1. This
amplifiers.  Diodes CR2 through CR7 serve as low
dc component is extracted by RC low pass filter R42
impedance shunt limiters.  Emitter follower stage Q6
and C47, and can be monitored at J4 (TP4 DISCR), thus
provides low impedance (75 ohms) coupling into the low
determining whether the frequency discriminator is
pass filter L11, L12 and L13. These variable inductors
properly tuned, or conversely, whether the if frequency
are adjusted for amplitude flatness and group delay
is properly centered.
characteristics. A 3 dB resistive pad (R44 through R46)
is used to improve the 75-ohm impedance match.
e. Video  Output  Amplifier.
The  frequency
c. Discriminator driver amplifiers Q7 and Q8 use
discriminator output is applied through capacitor C48 to
emitter by-passing to produce a flat amplitude response
the base of Q8, which together with Q9 comprises the
(+0.2 dB) and a differential group delay of less than 1
video output amplifier.  This circuit provides isolation
nanosecond over the 60 to 80 MHz frequency range.
between the frequency discriminator and 1.0 MHz low
Capacitor C42 in the emitter circuit of Q7 is adjusted for
pass filter 2A3. Resistors R43 and R44 set the base
flat response in the 63 to 77 MHz range. Capacitor C49
bias for Q8, while R45 limits the collector current of
in the emitter circuit of Q8 is adjusted for 13 dB
video output amplifier Q8 and Q9.  Capacitor C51
minimum gain. The discriminator is a standard Crosby
bypasses the collectors of video output amplifier Q8 and
type.  Tank circuit L19/C51 is tuned to 93 MHz and
Q9. The output is developed across resistor RH5 and
L20/C52 is tuned to 47 MHz. Capacitors C53 and C54
applied to the 1.0 MHz low pass filter 2A3 through
are  charged  with  opposite  polarities  through
capacitor C52, resistors R47 and R48 and connector J6
discriminator/rectifier diodes CR8 and CR9.
The
VIDEO OUTPUT.
charging time constants are short and the voltages
across C53 and C54 track frequency variations. The
algebraic sum of these voltages is developed across
2.68.1
Receiver, Radio R-1467(P)A/GRC-144 (V)
R66, R67 and R68. R67 is adjusted for average (center
Demodulator 2A4 Circuit Functioning (fig. 5-54.1)
frequency) level and the signal is fed through low pass
filter L21/L22 are adjusted for flat response (+1 dB)
Demodulator 2A4 converts the 70 MHz IF signal (from
below 30 MHz. The low pass filter rejects harmonics of
2A5) to the baseband (composite data/orderwire) signal.
the video signal.  Common emitter video amplifier
stages Q9 and Q10 use inverse feedback and provide a
a. The amplifier-low pass filter stage Q1-Q2
gain of 25 dB. Emitter follower stage Q11 provides low
includes an input matching section (R1, R2, R3, L1)
impedance coupling of the video signal to low pass filter
required to meet a 26 dB return loss limit.  Buffer
2A3.
amplifiers Q1 and Q2 provide isolation between the
input section and the low pass filter. Variable inductors
L4 and L5 in the low pass filter are adjusted for
2.69  70 MHz Intermediate Frequency Amplifier 2A5
frequency response flatness. The cutoff frequency of
Circuit Functioning (figs. 5-55 and 5-55.1)
the filter is 90 MHz and it rejects harmonics of the 70
The 70 MHz intermediate frequency amplifier 2A5
MHz IF signal.  A rectifier-filter network monitors the
amplifies the low level 70 MHz signal to a sufficient
input signal and supplies a test point voltage at J2 (TP2
level
to
drive
the
circuits.
INPUT LEVEL) .
2-112
Change 6


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