Radio Digital Regenerator 1A12A8 Circuit Functioning

TM 11-5820-695-35

2-47. Radio Digital Regenerator 1A12A8 Circuit

Peak Detectors. The FRPCM signal is I-

Functioning (fig. 536)

ctified by diodes CR2 and CR3. The rectified voltage is

developed across load resistors R9 and Rll and filtered

Radio digital regenerator 1A12A8 contains integrated

,by C2 and C4. C3 provides additional high frequency

circuits designated Al and A3 through All,. Figure 5-24

filtering. Under operation, C2 has an average positive

provides a circuit diagram for each type of integrated

voltage (E20) and C4 has an average negative voltage

circuit used. The complete functional description of

(E21). These voltages permit current to flow through C1

radio digital regenerator 1A12A8

is provided

only on peaks of the signal voltage applied to Q2 and

paragraph 2 Electrical operation of discrete piece parts

Q3. The algebraic sum of the voltages at E20 and B21

is provided in subparagraphs below.

is present at E23. This voltage (E23) is always the dc

average of the positive and negative peaks of the

Differential Amplifier.

The differential

FRPCM signal.

amplifier consists of a match pair of npn transistors,

Q1A and Q1B, connected in a common emitter

Linear Buffers 2 and 3. Linear buffer 2

configuration with resistors R2, R3 and R4 in the emitter

consists of npn and pnp emitter followers in series. R10

circuit. Resistor R1 is the 51 ohm termination for the

and R14 determine dc bias and R14 is the emitter load

pcm/orderwire input signal FRPCM. R6 and CR1 are

resistor.

The pnp and npn transistors provide

the collector load for Q1A and R5 is the collector load

temperature compensation and cancellation of offsets,

for Q1B. The base of Q1B is grounded so Q1A turns

that is, the base to emitter voltage drop (positive to

on when the input voltage goes positive. When Q1A

negative) of Q4A is cancelled by an opposite voltage

turns on there is a sharp drop in collector voltage (to

change at the base-emitter junction of QSA. Thus the

approximately Ov). This is the voltage at the base of

voltage at the base of Q4A always equals the voltage at

Q3; the voltage at the base of Q2 is 0.7v higher

the emitter of Q5A. The circuit of linear buffer 3 is the

because of the voltage drop across CR1. Q3 turns on,

same. The output signals are coupled through isolating

Q2 is off. As the input voltage returns toward 0 volts,

resistors R19 and R20.

the voltage at the base of Q3 rises. When the voltage

at the base of Q3 is 5.3 volts, Q3 starts to cut off and

Voltage Comparators. Voltage comparator

reaches cut-off when the base voltage is approximately

1 (All) receives the FRPCM signal at pin 3 (E13) and the

+6 volts. When the voltage at the base of Q3 is + 5.3

dc reference signal developed from the FRPOM signal

volts, the voltage at the base of Q2 is +6 volts; Q2 is

at pin 2 (F12). When the input signal at pin 3 goes more

still off. When the voltage at the base of Q3 is +6 volts,

than 0.6 millivolt positive with respect to the signal at pin

the voltage at the base of Q2 +6.7 volts. At 6.2 volts

2, the output goes to logic zero. When the input signal

and higher voltages Q2 conducts. The collector of Q1A

at pin 3 goes more than 0.6 millivolt negative with

with have about a 4 volt peak peak swing for a 1 volt

respect to the signal at pin 2, the output goes to logic

peak-peak input signal at base of Q1A.

one. Capacitor C5 is a supply voltage filter. When the

output of A11 switches to logic zero (low), the negative

Linear Buffer 1. Linear buffer 1 consists of

voltage through R22 speeds up the transition at the

a pair of complementary transistors (npn and pnp)

input of A3A. Voltage comparator 2(A8) is similar to

connected as emitter followers; Q2 conducts on the

voltage comparator 1 (All). A fixed reference input of

positive half cycle of the input signal and Q3 conducts

approximately +2v is supplied at pin 2 through voltage

on the negative half. When Q2 conducts, capacitor C1

divider resistors R40 and R42. Feedback applied

charges through diode CR2 and capacitor C2. When

through R41 improves circuit stability. Under normal

Q3 conducts, capacitor C1 discharges through diode

operation (pcm signal active), the output of A10 is low,

CR3 and capacitor C4. Thus, Q2 and Q3 are low

so the input of A8 (pin 3) is low and the output is high.

impedance sources which rapidly charge and discharge

The output of A8 switches to low, when the input at pin 3

capacitor C1 and couple the FRPCM signal into the

becomes more positive than +2 volts (pin 2). When the

peak detectors. R7 and R8 are current limiters to

output of A10 switches to logic one (high),

protect Q2 and Q3. The average dc voltage at the

emitters of Q2 and Q3 is + 6 volt dc, so the ac signal at

the bases is swinging positive and negative above and

below this value. When it is +5.3 volts or less (0.7 volt

negative with respect to +6 volt), Q3 is on; when it is

+6.7 volts or higher (0.7 volt positive with respect to + 6

volts), Q2 is on.

2-86