Digital Data Modem 1A12 Circuit Functioning

TM 11-5820-695-35

Transistor stages Q1 and Q2 are low level amplifier

2-39. Digital Data Modem 1A12 Circuit Functioning

stages which operate class A. Adjustable resistor R24

permits varying the emitter bias of Q2, thereby adjusting

Digital data modem 1A12 contains the plug-in

the gain. Capacitors C3, C4, C10, and C11 are emitter

components and chassis mounted components which

bypass capacitors. Dc bias for the base circuits of Q1

provide the signal interface between Radio Set

and Q2 is provided by R3, R4, R8, and R9. Dc bias for

AN/GRC-144 and the cable equipment. Also, the

the emitter circuits of Q1 and Q2 is provided by R5,

circuits in digital data modem 1A12 complete a direct,

R10, R24, and R25. Capacitors C2, C5, C8, and C12

current path between the cable input terminal and the

are feed-through bypass capacitors for the +28 vdc

cable output terminal.

The following paragraphs

power supply input. Capacitors C20, C52, C53, C9,

describe circuit operation of chassis mounted

C64, and C55 are used to tune the base circuits of Q1

components that are not discussed in paragraph 2-5 and

and Q2. The low output appears at the collector of Q2

2-6. The direct current path is described in paragraphs

and is coupled to the base of Q3 through L9, C14, and

2-5d and 2-e. Electrical operation of discrete piece

C13. Transistor stages Q3 and Q4 are driver stages

parts for the plug-in components is described in

which operate class C. Capacitors C15, C47, C59, C19,

paragraphs 2-40 through 249. The complete functional

C61, and C62 are used to tune the base circuits of Q3

description of the plug-in components is provided in

and Q4. Inductor L12 and capacitor C17 match the

paragraphs 2-5 and 2-6. Refer to paragraph 2-4 for the

collector of Q3 to the base of Q4. The output of Q4 is

meaning of the signal mnemonics.

The chassis

coupled to power amplifier stages Q5 and Q6 through

mounted component connections are shown in digital

matching section L16, L14, C22, C23, and R29 and

data modem A12 interconnecting diagram (fig. 528).

coaxial cable W6.

Two quarter wave (72 ohms)

The chassis mounted components provide signal

sections (W1 and W2) form a power divider which

interface between the plug-in components, selection and

divides the Q4 output and provides isolation between

indication of operating modes, filtering of signals, and

the power amplifier stages. L17, C24, and L18, C27 are

power distribution.

used to match the output of quarter wave sections W1

and W2 to the base circuits of Q5 and Q6. Resistors

Capacitors 1A12A12A1TB2C15 through

R17 and R20 provide a path for the unbalanced currents

C23 and capacitors 1A12A12A1TB2C37 and C38 filter

in the base and collector circuits of Q5 and Q6. Power

noise from the alarm monitor signal lines. Capacitors

amplifier stages Q5 and Q6 also operate class C. Their

1A12A12A1TB2C26 and C28 through C32 filter the

outputs are fed through matching networks to an output

orderwire signals.

Capacitors 1A12A12A1C36 and

hybrid consisting of quarter wave sections (72 ohms)

].A12A12A2C34 provide input bandwidth control for

W3 and W4. C30, L23, C32 and C31, L24, C33 match

1A12A1 and 1A12A11. Capacitors 1A12A12A1TB2C33

the collector output of Q5 and Q6 to the hybrid (W3,

and C35 filter the +5v supply to 1A12Al and 1A12All.

W4). The output hybrid combines the Q5 and Q6

Capacitors lA12A12A1TB2C24 and C25 are not used.

outputs and also provides isolation between the Q5 and

Resistor 1A12A12A2R2 is a voltage dropping resistor in

Q6 output circuits. The 568.750 to 606.250 MHz (18

series with level adjustment resistor 1A1l212A2R1.

watts, nominal) output is fed to the 600 to 1200 MHz

frequency doubler stage through cable W6.

The ADDM TRAFFIC SELECT switch

1A12A12A1S2 is not used in the synchronous mode of

600 to 1200 MHz Frequency Doubler. This

Radio Set ANIGRC-144. In the asynchronous mode, it

stage multiplies (times 2) the 568.750 to 606.250 MHz

is used to select either the 48-channel or the 96-channel

signal up to 1137.6-1212.5 MHz.

The frequency

data rate. To accomplish this, it supplies logic 1 (+6v)

doubling action is achieved by varactor diode CR3. The

and logic 0 (ground) signals to the baud generator and

input circuit consists of capacitors C34, C35, C46, and

pcm retiming circuits of radio control comparator

inductor plates L25 and L26. Resistor R22 provides

1A12A9. To make switch 1A12A12A1S2 operative in

stabilization and is also the dc return for CR8. The input

the asynchronous mode and inoperative in the

circuit is tuned to the 568.750 to 606.250 MHz input

synchronous mode, the logic signals from the switch are

signal. The output circuit of C36, C38, and L27 is tuned

routed through jumper (interlock) connections on plug-in

to the second harmonic of the input frequency and the

component 684092

1137.5 to 1212.5 MHz output signal (8 watts, nominal)

appears at the J5 OUTPUT connector.

2-78

Change 5